Seminars & Talks

Abstract: This talk will address some of our prior and on-going efforts on various security aspects of analog side channels of embedded cyber-physical systems (CPS). Modern CPS are complex interconnections of heterogeneous hardware and software components. With increasing complexity, connectivity, and programmability of embedded CPS devices, the potential cyber-attack surface has also been increasing making the study of related cyber-security issues highly relevant and timely. In particular, analog side channels are especially interesting from both attack (e.g., exploiting these side channels as an attack mechanism such as for information leakage) and defense viewpoints (e.g., utilizing these side channels for real-time monitoring). In this context, process-aware information leakage utilizing acoustic side channels from CPS instrumentation without impacting process stability and performance will be discussed. Thermal side channel monitoring of CPS devices leveraging their typical periodic code structures will also be discussed. Both the algorithmic techniques and hardware implementation aspects will be presented in the talk. The implementation of a Hardware-In-The-Loop (HITL) CPS testbed for study of cyber-security of embedded CPS devices will also be presented.

Bio:  Farshad Khorrami received his Bachelors degrees in Mathematics and Electrical Engineering in 1982 and 1984 respectively from The Ohio State University. He also received his Master's degree in Mathematics and Ph.D. in Electrical Engineering in 1984 and 1988 from The Ohio State University. Dr. Khorrami is currently a professor of Electrical & Computer Engineering Department at NYU where he joined as an assistant professor in Sept. 1988. His research interests include adaptive and nonlinear controls, robotics and automation,  control systems and CPS security, embedded systems security, unmanned vehicles (fixed-wing and rotary wing aircrafts as well as underwater vehicles and surface ships), smart structures, large-scale systems and decentralized control, smart grid security, and microprocessor based control and instrumentation. Prof. Khorrami has published more than 250 refereed journal and conference papers in these areas. His book on "modeling and adaptive nonlinear control of electric motors" was published by Springer Verlag in 2003. He also has fourteen U.S. patents on novel smart micro-positioners and actuators, control systems, cyber security, and wireless sensors and actuators. He has developed and directed the Control/Robotics Research Laboratory at Polytechnic Univrsity (Now NYU).  His research has been supported by the Army Research Office, National Science Foundation, Office of Naval Research, DARPA, Sandia National Laboratory, Army Research Laboratory, NASA, Boeing, and several corporations. Prof. Khorrami has served as general chair and conference organizing committee member of several international conferences.

Globalization of Integrated Circuit (IC) design and manufacturing is making designers and users of ICs re-assess their trust in hardware. As the IC design flow spans the globe - driven by cost-conscious consumer electronics - hardware is increasingly prone to reverse engineering, Intellectual Property (IP) piracy and malicious modifications (i.e., hardware trojans). An attacker, anywhere within the global design flow, can reverse engineer the functionality of an IC/IP, steal and claim ownership of the IP or introduce counterfeits into the supply chain. Moreover, an untrusted IC fab may overbuild ICs and sell them illegally. Finally, rogue elements in the fabs may insert hardware trojans into the design without the knowledge of the designer or the end-user of the IC; this additional functionality may subsequently be exploited to introduce errors in the results, steal sensitive information or incapacitate a fielded system. The semiconductor industry routinely loses $billions annually due to these attacks.  This talk will cover various forms of threats that the electronic chip supply chain is up against, as well as defenses against these threats. It will focus on one particular solution—logic locking—by covering its basics and evolution. It will also demonstrate the first-ever prototype: the first chip that is resilient to hardware-level threats.

Bio:  Ozgur Sinanoglu is an associate professor of electrical and computer engineering at New York University Abu Dhabi. He earned his B.S. degrees, one in Electrical and Electronics Engineering and one in Computer Engineering, both from Bogazici University, Turkey in 1999. He obtained his MS and PhD in Computer Science and Engineering from University of California San Diego in 2001 and 2004, respectively. He has industry experience at TI, IBM and Qualcomm, and has been with NYU Abu Dhabi since 2010. During his PhD, he won the IBM PhD fellowship award twice. He is also the recipient of the best paper awards at IEEE VLSI Test Symposium 2011 and ACM Conference on Computer and Communication Security 2013.  Prof. Sinanoglu’s research interests include design-for-test, design-for-security and design-for-trust for VLSI circuits, where he has around 160 conference and journal papers, and 20 issued and pending US Patents. Sinanoglu has given more than a dozen tutorials on hardware security and trust in leading CAD and test conferences, such as DAC, DATE, ITC, VTS, ETS, ICCD, ISQED, etc. He is serving as track/topic chair or technical program committee member in about 15 conferences, and as (guest) associate editor for IEEE TIFS, IEEE TCAD, ACM JETC, IEEE TETC, Elsevier MEJ, JETTA, and IET CDT journals.  Prof. Sinanoglu is the director of the Design-for-Excellence Lab at NYU Abu Dhabi. His recent research in hardware security and trust is being funded by US National Science Foundation, US Department of Defense, Semiconductor Research Corporation, and Mubadala Technology.

There has been an exponential  growth in the number of malware in the cyber world in the last few years. Modern malware use sophisticated techniques such as polymorphism and metamorphism to thwart the malware detection and analysis.

Detecting malware on the basis of their features and behavior is critical for the computer security community. Most anti-virus depends on the signature based detection which is relatively easy to evade and is ineffective for zero-day exploit based malwares. Static analysis analyzes the executables without executing them whereas dynamic analysis actually executes the malware in a sand-boxed environment and the system changes are logged for further investigation. In this thesis, we are adopting a hybrid approach in which we integrate the feature vectors extracted from both static and dynamic analysis to detect unknown malware. Our experiments obtained an accuracy of 98.62% in detecting malware. Our detection system is robust and scalable as we have increased the amount of samples used for analysis and reduced the feature space compared to the existing approaches in the literature.

Abstract: The only way to really determine what a piece of malicious software is doing is to analyze it. Statistics show that around 3 lakhs malwares per day are being encountered by various antivirus companies. Analysis of such large number of malwares is a challenging task. Moreover, most of the malware are modified versions of some pre-existing malware and do not need manual analysis. The experts need to focus more on the malwares not encountered before to identify their signature. There are two techniques which can be used to perform an analysis on a piece of software to understand what it does: static analysis – analyzing the source of the malware and dynamic analysis-observation of network traffic and any changes made to the operating system environment as the executable runs. Our focus during the internship was on static analysis. We applied machine learning models on the attributes of the files such as Windows Portable Executable files in order to correctly classify a file as malicious or benign.