Prof. Sandeep Kumar Shukla

Prof. Sandeep K. Shukla will be a keynote speaker at the 23rd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA'17)on "Cyber Security of Cyber Physical Critical Infrastructures: A Case for a Schizoid Design Approach" held in Taiwan during Aug 16-18, 2017.

घर पहुंचने से पहले ही चालू कर सकेंगे एसी (August, 2018)

दुनिया के बड़े वैज्ञानिक लेंगे आईआईटीयस की क्लास (August, 2018)

Aadhaar gets new security features, but this is why your data still may not be safe (June, 2017)

Prof. Sandeep Shukla will address the audience on the occasion of IIT Kanpur Technology Day Celebrations to discuss cyber security on May 11, 2017 View Details

Prof. Sandeep K. Shukla has been invited to membership in the subgroup on mobile banking & security, and subgroup on card based payments & security formed by Reserve Bank of India (May, 2017)

आईआईटी कानपुर के प्रोफेसर संदीप शुक्ला ने बनाया इत‌िहास, जान‌िए क्या है खास (October, 2016)

IIT Kanpur to Start New Cyber Security Center (August 2015)

Shifting to Embedded Systems for sustainability and developing communities (July 2014)

Sandeep Shukla named IEEE Fellow (Dec. 2013)

Shukla named editor-in-chief of ACM embedded computing journal (Nov. 2013)

Shukla named ACM Distinguished Scientist (Nov. 2012)

EEWeb featured engineer (Oct. 2012)

New embedded software design class to be offered this spring (Oct. 2012)

ICTAS research awards 2012 (July 2012)

Sandeep Shukla promoted to Professor (June 2012)

Shukla publishes book on low power design (Nov. 2011)

Shukla publishes books on hardware, embedded software synthesis (Sept. 2010)

New computing simulation tool nets best paper award for Shukla and colleagues (Feb. 2010)

Shukla invited to Frontiers of Engineering Symposium (Jan. 2010)

Guaranteeing bug-free software for critical embedded systems (Jan. 2010)

Souping up hardware sim speed (2010 Annual Report)

Resilient, sustainable infrastructures (2009 Annual Report)

Creating a visual environment for safety-critical embedded software (2009 Annual Report)

Shukla receives Humboldt Foundation Award (May 2008)

Safety-critical embedded software: Correct by construction? (2008 Annual Report)

Embedded computers research by Virginia Tech's Shukla attracts national attention (July 2007)

Nano electronics bring mega design challenges (2007 Annual Report)

Researchers from Virginia Tech and beyond meet to advance nanocomputing (April 2006)

New defect-tolerant architectures needed for rampant unreliability in nanotechnology (Feb. 2004)

NSF 2003 PECASE Award

Boosting the productivity of embedded systems designers (2003 Annual Report)

Major Accomplishments (Selected)

  • Co-founder of the Interdisciplinary Center for Cyber Security and Cyber Defense of Critical Infrastructures at IIT Kanpur, funded by the Department of Science and Technology, Government of India, 2016

  • Coordinator of The Center of Digital Technology in Governance under the Viswajeet Scheme of the Ministry of Human Resources Development, Government of India, 2017

  • Co-founder of the Center for Embedded Systems for Critical Applications (CESCA) at Virginia Tech, USA 2003 and Director of CESCA 2010-2012

  • Editor-in-Chief, ACM Transactions on Embedded Computer Systems (2013-now)

  • Associate Editor for ACM Transactions on Cyber-Physical Systems (2015 - now) IEEE Transactions on Computers (2008 - 2014), IEEE Embedded Systems Letters (2009 - 2013), IEEE Design & Test (2003-2011),. IEEE Transactions on Industrial Informatics (2007-08), Computer Society of India’s Journal of Computing (2011-now), Elsevier Journal on Nano-networks (2009-now)

  • Guest Editor, ACM Transactions on Embedded Computing, ACM Journal on Emerging Technologies for Computing (JETC), IEEE Transactions on Computers, IEEE Design & Test, IEEE Transactions on Emerging Computing Technologies, Springer Journal on Formal Methods in System Design, EURASIP Journal on Embedded Systems

  • Program Co-Chair/Chair, ACM/IEEE Conference on Formal Methods and Models for Co-Design (MEMOCODE 2003, 2015), International Conference on Applications of Concurrency in System Design (ACSD 2007), IEEE/ECSI ESL Synthesis Symposium (ESLsyn 2011), IEEE Workshop on High Level Design Validation and Test (HLDVT 2011), International Workshop on Formal Methods for GALS Design (FMGALS 2003, 2009)

  • General Chair, ACM/IEEE Conference on Formal Methods and Models for Co-Design (MEMOCODE 2004 and MEMOCODE 2012), IEEE/ECSI ESL Synthesis Symposium (ESLsyn 2011), International Conference on Security, Privacy and Cryptographic Engineering (SPACE 2017)

  • Technical Program Committee member, ACM/IEEE Design Automation Conference (DAC), ACM/IEEE International Conference on Computer Aided Design (ICCAD) , ACM/IEEE Design Automation and Test in Europe (DATE), International Conference on Computer Design (ICCD), and numerous other conferences sponsored by ACM and/or IEEE

  • Development of a real SCADA Cyber Security Test Bed at IIT Kanpur and discovery of cyber threat models and attacks on widely used SCADA components in India in 2016-17

  • In the process of developing India’s first Critical Infrastructure Cyber Range at IIT Kanpur, 2017

  • Google Scholar h-index = 33, i10-index = 103, Total Citation count= 4351

  • PhD thesis showed efficient reduction of all branching-time preorders and equivalences as well as branching-time temporal logic model checking into the satisfiability of Horn clauses - use of a special case of SAT problem before bounded model checking made SAT based methods popular in verification

  • Competitive Analysis of on-line algorithms for dynamic power management in embedded systems - widely cited

  • Work on showing that reliability driven design of gate-level circuits with redundancy can be reduced to probabilistic model checking - showed that other tools such as PTM rediscovered mechanisms already implemented inside a probabilistic model checker

  • Work on showing that stochastic power management strategies can be derived using probabilistic model checking - provided uniform basis for earlier work on stochastic power management strategies using Markov processes

  • Development of multiple models of computation (multi-MoC) kernel for SystemC - provided a basis for heterogeneous modeling in SystemC

  • Development of meta-model driven framework for IP composition before the SPIRIT consortium that standard- ized meta-data for hardware IP was even established

  • Worked on incorporating power saving techniques such as combinational and sequential clock gating, procrasti- nation scheduling etc., in two high level synthesis tools

  • Development an embedded software specification tool and software synthesis methodology and tools from polychronous specifications for the US Air Force research labs



Teaching Interests
Cyber Security, Cyber Physical Systems, Security of Critical Infrastructures, Embedded Systems - hardware and Software, Electronic Design automation, Formal methods for system design, Software Synthesis from Formal Specifications, Software Security, Smart Grid and Communication Infrastructures interdependence, Complex Systems and Networks
+91 (512) 259-6342