Ozgur Sinanoglu (New York University at Abu Dhabi)
Date/Time
Venue Details
RM 301

Globalization of Integrated Circuit (IC) design and manufacturing is making designers and users of ICs re-assess their trust in hardware. As the IC design flow spans the globe - driven by cost-conscious consumer electronics - hardware is increasingly prone to reverse engineering, Intellectual Property (IP) piracy and malicious modifications (i.e., hardware trojans). An attacker, anywhere within the global design flow, can reverse engineer the functionality of an IC/IP, steal and claim ownership of the IP or introduce counterfeits into the supply chain. Moreover, an untrusted IC fab may overbuild ICs and sell them illegally. Finally, rogue elements in the fabs may insert hardware trojans into the design without the knowledge of the designer or the end-user of the IC; this additional functionality may subsequently be exploited to introduce errors in the results, steal sensitive information or incapacitate a fielded system. The semiconductor industry routinely loses $billions annually due to these attacks.  This talk will cover various forms of threats that the electronic chip supply chain is up against, as well as defenses against these threats. It will focus on one particular solution—logic locking—by covering its basics and evolution. It will also demonstrate the first-ever prototype: the first chip that is resilient to hardware-level threats.

Bio:  Ozgur Sinanoglu is an associate professor of electrical and computer engineering at New York University Abu Dhabi. He earned his B.S. degrees, one in Electrical and Electronics Engineering and one in Computer Engineering, both from Bogazici University, Turkey in 1999. He obtained his MS and PhD in Computer Science and Engineering from University of California San Diego in 2001 and 2004, respectively. He has industry experience at TI, IBM and Qualcomm, and has been with NYU Abu Dhabi since 2010. During his PhD, he won the IBM PhD fellowship award twice. He is also the recipient of the best paper awards at IEEE VLSI Test Symposium 2011 and ACM Conference on Computer and Communication Security 2013.  Prof. Sinanoglu’s research interests include design-for-test, design-for-security and design-for-trust for VLSI circuits, where he has around 160 conference and journal papers, and 20 issued and pending US Patents. Sinanoglu has given more than a dozen tutorials on hardware security and trust in leading CAD and test conferences, such as DAC, DATE, ITC, VTS, ETS, ICCD, ISQED, etc. He is serving as track/topic chair or technical program committee member in about 15 conferences, and as (guest) associate editor for IEEE TIFS, IEEE TCAD, ACM JETC, IEEE TETC, Elsevier MEJ, JETTA, and IET CDT journals.  Prof. Sinanoglu is the director of the Design-for-Excellence Lab at NYU Abu Dhabi. His recent research in hardware security and trust is being funded by US National Science Foundation, US Department of Defense, Semiconductor Research Corporation, and Mubadala Technology.

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