Abstract: As the world is shifting towards the faster 4G LTE which is the next generation network enabling to meet the requirements of mobile migrations of Internet applications such as VoIP (Voice over IP), video streaming and mobile TV, Encryption of data being sent through the network is of utmost importance. As per international standards set by 3GPP and ETSI organisation, AES, SNOW-3G and ZUC algorithms have chosen for maintaining data security. The objective of the internship is to design a co-processor for ZUC algorithm, EIA-3 and EEA-3 algorithms on FPGA board. Although these algorithms could be implemented on processors using software solutions, implementing a dedicated co-processor would make the process more robust in nature, difficult for the attacker to interfere if the system is compromised and increase the throughput of the algorithm by many folds than the software implementation. ZUC algorithm is a stream cipher mainly intended for the Chinese market as it is the only algorithm approved by the Chinese government. My work has been mainly focused on understanding the ZUC algorithm in its entirety and implementing it on an Artix-7 board. After implementing the algorithm using the Xilinx Vivado tool, I checked for the important characteristics like critical path, maximum operating frequency, area used and total power consumed and compared them existing literature to check the efficiency of my design. Using ZUC as core, I have finally implemented EEA-3 and EIA-3 algorithm which are the actual confidentiality and integrity algorithm which will be deployed in field.
Jayadeep reddy Ganta